NVIDIA Posted $96B the Quarter OpenAI's Own Chip Arrived

NVIDIA reported $96 billion in quarterly revenue at a 75% gross margin — in the same month its largest customer benchmarked silicon designed to route around it.

Both facts are real, and the gap between them is the clearest read available on where inference money is heading.

The quarter

NVIDIA's $96 billion in Q2 revenue was up 106% year over year, with roughly $60 billion in net income and a 75% gross margin. The stock rose 8%. David Sacks called the print the definitive answer to the "AI capex is a bubble" narrative.

That 75% margin is also the number that explains everything else in this story. Every company spending billions annually on NVIDIA GPUs is funding it, and the ones with enough inference volume have started treating it as a tax rather than a cost of doing business.

What OpenAI actually built

Jalapeño is a custom inference ASIC — OpenAI's first silicon, designed from a blank sheet, built with Broadcom and fabricated on TSMC's N3P process. It is not a training chip and does not replace NVIDIA GPUs. It runs large language models at inference time.

The specs presented at Hot Chips 2026 are built around power, not raw throughput:

• 700W TDP — half the power envelope of NVIDIA's GB300, which draws 1,400W
• 13.4 PFLOPS at MXFP4 precision
• 216 GiB of HBM4 at 15.4 TB/s bandwidth, across six HBM4 stacks per package
• 64 paired core/memory slices in a NUMA-style layout
• Gluon, OpenAI's spatial programming framework, mapping thread blocks directly onto physical cores

A 2,048-chip system reaches 27 EFLOPS with 432 TiB of aggregate memory. Broadcom supplied Tomahawk6 networking switches, rated at 600 GB/s in the local domain for 128 ASICs and 200 GB/s in the global domain at full 2,048-chip scale. Celestica integrated the boards and racks.

The published comparisons: against a GB200 running GPT-OSS 120B, 1.9x higher peak tokens per second per kilowatt and 1.7x lower end-to-end latency. Against a GB300 on DeepSeek R1 670B, 1.7x throughput per kilowatt and 3.6x lower latency.

The caveat that reframes the headline

Here is the part most coverage skips. SemiAnalysis noted that Jalapeño carries HBM4, which puts its real competitive peer not at Blackwell — that generation uses HBM3e — but at NVIDIA's next-generation Vera Rubin platform, which also uses HBM4 and has already begun shipping.

Measured against Rubin's published specs, the two are roughly head-to-head on cost per output token. The 1.9x figure is real, but it is a comparison against last year's NVIDIA silicon.

If you were sizing an inference budget off the headline number, that distinction is the whole story. A generational lead and a generational tie imply very different procurement decisions.

Nine months from RTL to production traffic

The development timeline is arguably the more durable signal. Greg Brockman laid it out: architecture concept in late 2024, RTL work beginning February 2025, tapeout in November 2025, first silicon in May 2026 with Codex running on it that same month, public announcement with Broadcom in June, and Hot Chips benchmarks in August.

That is nine months from RTL freeze to a chip running production workloads, against a typical ASIC development cycle of 18 to 24 months. Part of the compression came from OpenAI using its own models — Codex with GPT-Astra wrote and optimized kernels, an explicitly recursive loop where AI shortened the schedule for AI hardware.

For anyone forecasting competitive dynamics, the schedule matters more than the benchmark. It implies the next custom chip does not need three years of runway.

OpenAI is the sixth, not the first

The custom-silicon roster is already crowded: Google TPU from 2015 onward, now six generations deep with 4.3 million shipments projected in 2026; Amazon's Trainium and Inferentia, with Bloomberg reporting in June 2026 that Amazon is in early talks to sell Trainium outside AWS for the first time; Meta's MTIA for internal recommendation and ranking inference; Microsoft's Maia in Azure; and AMD's Taalas acquisition, which bakes LLM weights directly into transistors for 17,000 tokens per second on a single chip.

The pattern repeats: once your inference volume is large enough to amortize a $500M-plus development cost, building beats renting. Omdia projects custom ASICs will exceed GPUs in volume by 2028, and about half of all AI infrastructure capital expenditure now comes from hyperscalers that either run a custom chip program or could plausibly start one.

Jensen Huang's response to CNBC's Mad Money was dismissive: "Lots of projects get started. Lots of projects get canceled." The dismissal carries a real argument — custom ASICs optimize for today's architecture, and NVIDIA's general-purpose GPUs survived the CNN-to-transformer transition. A 2026 inference ASIC may not survive the next architectural shift. OpenAI's captive-only design also forgoes the scale economics that make Google's TPU ecosystem work.

Open weights push in the same direction

Custom silicon is not the only pressure on inference margins. Z.ai's GLM-5.3 release shipped 756 GB of weights across 141 Safetensors shards, with vLLM and SGLang support — a footprint that keeps unquantized self-hosting in multi-GPU data center territory, but which Cloudflare put on Workers AI at launch for $1.40 per million input tokens and $4.40 per million output tokens.

Two different routes, one destination: inference is becoming a commodity priced per token, while training remains the segment paying NVIDIA's margin.

What to watch

NVIDIA's current revenue is overwhelmingly training compute, and that market is still growing faster than custom silicon can erode it. Even OpenAI, now shipping its own inference chip, separately secured a $105 billion financing deal for a leased data center.

The number to track next is not another benchmark. It is whether Jalapeño-class parts get compared against Rubin rather than Blackwell in the next round of published results — and whether Amazon's talks to sell Trainium outside AWS actually close, which would turn captive silicon into a market.